Infineon CYT6BJ
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The Infineon CYT6BJ (TVII-B-H-16M) is a subfamily of Infineon Traveo T2G microcontrollers containing a Cortex M0+ core and 4 Cortex M7 cores.
SRAM
The CYT6BJ family features 512 KB + 2 x 256 KB = 1024 KB of SRAM located at 0x28000000. The first 2 KB are reserved for internal usage and may not be used.
Flash memory layout
The CYT6BJ series devices have two 8384 KiB Code flash banks and two 256 KiB Work flash banks. All flash banks are split in an area of large sectors and an area of small sectors.
| Flash | Start address | End address | Sector size | Sector count | Total size |
|---|---|---|---|---|---|
| Code flash 0 large area | 0x10000000 | 0x107EFFFF | 32 KiB | 254 | 8128 KiB |
| Code flash 0 small area | 0x107F0000 | 0x1082FFFF | 8 KiB | 32 | 256 KiB |
| Work flash 0 large area | 0x14000000 | 0x1402FFFF | 2 KiB | 96 | 192 KiB |
| Work flash 0 small area | 0x14030000 | 0x1403FFFF | 128 B | 512 | 64 KiB |
| Code flash 1 large area | 0x18000000 | 0x187EFFFF | 32 KiB | 254 | 8128 KiB |
| Code flash 1 small area | 0x187F0000 | 0x1882FFFF | 8 KiB | 32 | 256 KiB |
| Work flash 1 large area | 0x1C000000 | 0x1C02FFFF | 2 KiB | 96 | 192 KiB |
| Work flash 1 small area | 0x1C030000 | 0x1C03FFFF | 128 B | 512 | 64 KiB |
Note:
For information regarding Supervisory Flash (SFlash), please refer to Infineon Traveo T2G article
For information regarding Supervisory Flash (SFlash), please refer to Infineon Traveo T2G article
Instruction Trace
For more information regarding instruction tracing for this device, see Tracing on Infineon Traveo II (CYT4BF)