Infineon CYT2CL

The Infineon CYT2CL (TVII-C-E-4M) is a subfamily of Infineon Traveo T2G microcontrollers containing a Cortex M4 and Cortex M0+ CPU.

SRAM

The CYT2CL family features 512 KB of SRAM located at 0x08000000. The first 2 KB are reserved for internal usage and may not be used.

Flash memory layout

The CYT2CL series devices have 4160 KB Code flash and a 128 KB Work flash. Both flashes are split in an area of large sectors and an area of small sectors.

Flash	Start adress	End adress	Sector size	Sector count	Total size
Code flash large area	0x10000000	0x103EFFFF	32 KB	126	4032 KB
Code flash small area	0x103F0000	0x1040FFFF	8 KB	16	128 KB
Work flash large area	0x14000000	0x1402FFFF	2 KB	96	192 KB
Work flash small area	0x14030000	0x1403FFFF	128 B	512	64 KB

Note:
For information regarding Supervisory Flash (SFlash), please refer to Infineon Traveo T2G article