Infineon CY4532 EZ-PD CCGAP3 Evaluation Kit
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This article describes specifics for the Infineon CY4532 EZ-PD CCGAP3 Evaluation Kit.
Preparing for J-Link
- Connect the J-Link to this pins on MINIPROG3 CONNECTOR (J1):
| J-Link Pin | Connector | Color on image | Notes |
|---|---|---|---|
| VTref (Pin 1) | J1-1 | Red (1) | Signal for VTref and 5V-Supply have to be spliced together |
| GND (Pin 4) | J1-2 | Black | |
| SWDIO (Pin 7) | J1-5 | Yellow | |
| SWCLK (Pin 9) | J1-4 | Green | |
| 5V-Supply (Pin 19) | J1-1 | Red (2) | Signal for VTref and 5V-Supply have to be spliced together |
- The board must be powered through J-Links 5V-Supply signal.
- Connecting to the device requires a special connection sequence that is very time critical. For it to work, the following J-Link options have to be enabled:
- J-Link supplies power (Command in J-Link Commander: "power on")
- VTref has to be set to fixed value 3.3V (Command in J-Link Commander: "vtref 3300")
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
A prepared J-Flash project that enables the above mentioned settings is available here: File:CYPD3171xx.flash