GigaDevice GD32A7

The GigaDevice GD32FA7 series are microcontrollers based on the ARM Cortex-M7 core, featuring an additional Cortex-M23 core.

Flash Banks

The flash memories accessible depend on the core selected:

M7 cores

Flash Bank	Base address	Size	J-Link Support
Main Flash	0x08000000	Up to 2048 KB
Data Flash	0x08800000	128 KB
Option bytes	0x1FFFF800	64 Bytes

M23 core (HSM)

Flash Bank	Base address	Size	J-Link Support
HSM Main Flash	0x08440000	Up to 512 KB
HSM Data Flash	0x08880000	96 KB
HSM Option bytes	0x1FFFF880	16 Bytes

HSM Main Flash is a portion of Main Flash used by the M7 cores but only accessible by the M23 core. The size of this portion and the remaining flash memory for the M7 cortes depends on the Option byte settings.

Watchdog Handling

The device has up to four watchdogs that are all fed during flash programming: FWDGT0, FWDGT1, WWDGT0 and WWDGT1.

Multi-Core Support

Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here.
The GD32A7 family comes with a variety of multi-core options. Some devices from this family feature a secondary Cortex-M7 core and all devices feature an additional Cortex-M23 core (HSM) that is disabled by default.

Core	J-Link Support
M7 / M7_0
M7_1
M23

Device Specific Handling

Connect

On Connect, protection level is checked. For further information regarding this, please click here.

Reset

The device uses normal Cortex-M reset, no special handling necessary, like described here.