CVA CHIP CVM010x

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The CVA CHIP CVM010x are Cortex-M0 based microcontrollers.

Supported devices

Refer to the supported device list for a full list of all supported CVM010x family devices, their corresponding names and connection diagrams.

Target interfaces

Interface J-Link support Flasher support
SWD YES.png YES.png

Flash banks

Flash bank Base address J-Link support Flasher support Loader
Name Bank size
PFLASH 0x00000000 YES.png YES.png Default Up to 128 KB
DFLASH 0x00020000 YES.png YES.png Default 32 KB
Info region 0 [1] 0x00028800 YES.png YES.png Default 1 KB
Info region 1 0x00028000 YES.png YES.png Default 1 KB
Info region 3 [2] 0x00028400 YES.png YES.png Default 1 KB
  1. ↑ Sector erase feature is not supported. Erased only in mass erase process.
  2. ↑ One time programmable memory and do not support erase feature.

Watchdog handling

  • The device has a watchdog WDOG.
  • The watchdog is fed during flash programming.

Device specific handling

Reset

CVM014x devices have an integrated bootloader which executes before target program execution. While bootloader execution, PFlash can not be accessed from 0x0 - 0xFFF. A special reset strategy is implemented to handle this.

Note:
In case there is no target application in program flash, the core will halt in the hardfault state.

Attach

Attach is a debugging feature which exclusively applies to J-Link and J-Trace and does not apply to Flasher.

  • Attach is supported / desired

Security and mass erase

  • The device provides a set of security features that can restrict access to memory contents or debugging capabilities. Some security options require a mass erase before new values can be programmed.

Security settings and mass erase operations are managed through the Device Provisioner utility: CVA CHIP CVM010x Security