Andes Trace

Andes Trace (also called NCETRACE200) is a non-intrusive tracing solution of AndesCore RISC-V processors from Andes Technologies.

It uses an E-Trace encoder for package generation and converts and outputs the data via the N-Trace interface.

Andes trace offers options for both on-chip tracing and off-chip tracing.

Support

Andes trace support has been added with J-Link software version V9.56.

On-Chip trace can be used with a J-Link or J-Trace Pro probe. Off-Chip trace can only be used with a J-Trace Pro probe.

Andes Trace was tested with FPGA bitstreams provided by Andes Tech. The resulting example projects can be found here: https://kb.segger.com/AndesTech

Setup requirements

As there is no autodetection of trace components available for RISC-V devices you have to supply the trace component memory map to the J-Link software. The minimum required components are listed here.

The addresses can be set via J-Link command strings e.g. as explained here.

If you have DMI as access type implemented for your chip with Andes Trace make sure to set the option MemTypeToUse to 1 in the command string call as documented. For SBA Access set MemTypeToUse to 2.

For example: RISCV_SetTEBaseAddr = 0x10000000 MemTypeToUse = 1

In a J-Link script it would look like this:

 
int ConfigTargetSettings(void) {
  //
  // Trace related 
  //
  JLINK_ExecCommand("RISCV_SetTEBaseAddr   = 0x8000, MemTypeToUse = 1");  // Set base addr. of trace encoder
  JLINK_ExecCommand("RISCV_SetSRAMBaseAddr = 0x2000, MemTypeToUse = 1");  // Set base addr. of SRAM sink. 
  JLINK_ExecCommand("RISCV_SetTFBaseAddr   = 0x4000, MemTypeToUse = 1");  // Set base addr. of Funnel sink. 
  return 0;
}