ArteryTek AT32F41x

From SEGGER Knowledge Base
Revision as of 16:01, 23 January 2024 by Torben.scharping (talk | contribs) (Created page with "Artery AT32F41x are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | In...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search

Artery AT32F41x are Cortex-M4 based MCUs

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Internal flash 0x08000000 Up to 256 KB YES.png

Watchdog Handling

  • The watchdog is fed during flash programming.

Device Specific Handling

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application

Retrieved from "https://kb.segger.com/index.php?title=ArteryTek_AT32F41x&oldid=17540"