ZhiXin Z20K11xN: Difference between revisions
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(Created page with "Category:Device families The '''ZhiXin Z20K11xN''' series are 32-bit low-power microcontrollers based on the Arm® Cortex®-M0+ processor. __TOC__ ==Flash Banks== ===Z20K114N=== {{:Template:FlashBankTable | FlashBanks= {{:Template:FlashBankTableRow | BankName=Program Flash | BaseAddress=0x00000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= {{:Template:FlashLoader | Name=Default | Size=64 KB }} }} {{:Template:FlashBankTableRow | BankName=Data Flash | BaseAddress=0...") |
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{{:Template:FlashBankTableRow | BankName=User IFR | BaseAddress=0x02000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | {{:Template:FlashBankTableRow | BankName=User IFR | BaseAddress=0x02000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | ||
{{:Template:FlashLoader | Name=Default | Size=16 KB }} | {{:Template:FlashLoader | Name=Default | Size=16 KB }} | ||
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{{:Template:FlashBankTableRow | BankName=User IFR | BaseAddress=0x02000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | {{:Template:FlashBankTableRow | BankName=User IFR | BaseAddress=0x02000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | ||
{{:Template:FlashLoader | Name=Default | Size=16 KB }} | {{:Template:FlashLoader | Name=Default | Size=16 KB }} | ||
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{{:Template:FlashBankTableRow | BankName=User IFR | BaseAddress=0x02000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | {{:Template:FlashBankTableRow | BankName=User IFR | BaseAddress=0x02000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | ||
{{:Template:FlashLoader | Name=Default | Size=16 KB }} | {{:Template:FlashLoader | Name=Default | Size=16 KB }} | ||
}} | }} | ||
Latest revision as of 11:01, 17 February 2025
The ZhiXin Z20K11xN series are 32-bit low-power microcontrollers based on the Arm® Cortex®-M0+ processor.
Flash Banks
Z20K114N
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| Program Flash | 0x00000000 | 
|
Default | 64 KB |
| Data Flash | 0x01000000 |
|
Default | 64 KB |
| User IFR | 0x02000000 |
|
Default | 16 KB |
Z20K116N
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| Program Flash | 0x00000000 |
|
Default | 128 KB |
| Data Flash | 0x01000000 |
|
Default | 128 KB |
| User IFR | 0x02000000 |
|
Default | 16 KB |
Z20K118N
| Flash Bank | Base address | J-Link Support | Loader | |
|---|---|---|---|---|
| Name | Size | |||
| Program Flash | 0x00000000 |
|
Default | 256 KB |
| Data Flash | 0x01000000 |
|
Default | 128 KB |
| User IFR | 0x02000000 |
|
Default | 16 KB |
Watchdog Handling
- The device has a watchdog (WDOG).
- The watchdog is fed during flash programming.
Device Specific Handling
Connect
- On connect the RAM working area is initialized. This is necessary because this device uses ECC RAM.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.