TI CC2340: Difference between revisions
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==Flash Banks== | ==Flash Banks== | ||
The TI CC2340 series does not provide a sector erase command but a chip erase command which affects the program flash as well as the CCFG block. Unfortunately, the debug interface is not open in case of an invalid CCFG block is detected which is the case after erasing it. For that reasons, it's mandatory to always program the application + a valid CCFG block when updating the target application. | The TI CC2340 series does not provide a sector erase command but a chip erase command which affects the program flash as well as the CCFG block. Unfortunately, the debug interface is not open in case of an invalid CCFG block is detected which is the case after erasing it. For that reasons, it's mandatory to always program the application + a valid CCFG block when updating the target application. The flash interface provides an option called '''retainSelMainSectors''' which can be used to prevent specific sectors from being affected by the erase chip command. This can be really useful when working with a HSM firmware which is located in the program flash. The '''retainSelMainSectors''' sectors is enabled by default. | ||
===Internal Flash=== | ===Internal Flash=== | ||
Revision as of 10:34, 28 January 2025
The TI CC2340 devices are Cortex-M0 based wireless MCUs.
Flash Banks
The TI CC2340 series does not provide a sector erase command but a chip erase command which affects the program flash as well as the CCFG block. Unfortunately, the debug interface is not open in case of an invalid CCFG block is detected which is the case after erasing it. For that reasons, it's mandatory to always program the application + a valid CCFG block when updating the target application. The flash interface provides an option called retainSelMainSectors which can be used to prevent specific sectors from being affected by the erase chip command. This can be really useful when working with a HSM firmware which is located in the program flash. The retainSelMainSectors sectors is enabled by default.
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Program Flash | 0x00000000 | up to 512 KB | 
|
| CCFG Flash | 0x4E020000 | 2 KB |
|
CCFG Flash
The CCFG (Customer Configuration) sector contains configuration data. The boot sequence uses a lot of these configurations. For example whether or not to enable debugging. Where the vector table of the application is located (such that the boot sequence knows where to jump to) The CCFG also contains CRC fields which is used by the boot sequence to check if the CCFG data is valid In general, TI example applications will contain the CCFG data.
As explained above, users have to ensure that the CCFG block is valid in order to guarantee a proper functionality. This means that all application images must include a (valid) CCFG sector.
Device Specific Handling
Connect
A device specific connect sequence is executed which supports:
- Connecting to a device with invalid CCFG block. In this case, a default CCFG will be programmed as part of the connect.
- Connecting to a device with valid CCFG block
As part of the connect sequence, the J-Link determines the silicon revision: PG1.0 / PG2.0
Reset
The device uses custom reset which performs a reset via the SACI interface:
- In case of a valid application is programmed, the MCU will be halted on the reset vector (application entry point).
- In case of no valid application is programmed, the MCU will be halted in a so called debug loop
Disconnect
xxx
Limitations
Flasher Stand-Alone Mode
Supported since software version V7.96n.
Attach
Attach is supported by the J-Link if not excluded by the current CCFG (e.g. debug disabled after POR / authentication enabled).
Security
Connecting to a locked device / password authentication is not supported yet.
Flash Breakpoints
Not supported because re-programming specific sectors is not possible (technical limitation of the device)