AlifSemi B1: Difference between revisions
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| FlashBanks= | | FlashBanks= | ||
{{:Template:FlashBankTableRow | BankName=OSPI <ref name="FootNote1" > | {{:Template:FlashBankTableRow | BankName=OSPI SS0 <ref name="FootNote1" > | ||
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the [[QSPI Flash Programming Support | QSPI Flash Programming Support article]].<br> | QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the [[QSPI Flash Programming Support | QSPI Flash Programming Support article]].<br> | ||
</ref> | </ref> | ||
| BaseAddress=0xA0000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | | BaseAddress=0xA0000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | ||
{{:Template:FlashLoader | Name=Default | Size=Up to | {{:Template:FlashLoader | Name=Default | Size=Up to 256 MB}} | ||
}} | |||
{{:Template:FlashBankTableRow | BankName=OSPI SS1 <ref name="FootNote1" > | |||
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the [[QSPI Flash Programming Support | QSPI Flash Programming Support article]].<br> | |||
</ref> | |||
| BaseAddress=0xB0000000 | JLinkSupport=yes | NumOfLoaders=1 | Loader= | |||
{{:Template:FlashLoader | Name=Default | Size=Up to 256 MB}} | |||
}} | }} | ||
}} | }} |
Latest revision as of 16:03, 6 August 2025
The AlifSemi Balletto B1 are Cortex-M55 based microcontrollers.
Flash Banks
Flash Bank | Base address | J-Link Support | Loader | |
---|---|---|---|---|
Name | Size | |||
OSPI SS0 [1] | 0xA0000000 | ![]() |
Default | Up to 256 MB |
OSPI SS1 [1] | 0xB0000000 | ![]() |
Default | Up to 256 MB |
- ↑ 1.0 1.1
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
Watchdog Handling
- The device has a watchdog.
- The watchdog is fed during flash programming.
Device Specific Handling
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.