GigaDevice GD32C1: Difference between revisions
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[[Category:Device families]] | |||
The GigaDevice GD32C1 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor. | The GigaDevice GD32C1 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor. | ||
__TOC__ | __TOC__ | ||
| Line 8: | Line 9: | ||
! Flash Bank || Base address !! Size || J-Link Support | ! Flash Bank || Base address !! Size || J-Link Support | ||
|- | |- | ||
| Main flash || 0x08000000 || | | Main flash || 0x08000000 || 128 KB || style="text-align:center;"| {{YES}} | ||
|- | |- | ||
| Option Bytes || 0x1FFFF800 || 16 B || style="text-align:center;"| {{YES}} | | Option Bytes || 0x1FFFF800 || 16 B || style="text-align:center;"| {{YES}} | ||
|- | |- | ||
| OTP | | OTP Bytes || 0x1FFF7000 || 512 B || style="text-align:center;"| {{NO}} | ||
|} | |} | ||
==Watchdog Handling== | ==Watchdog Handling== | ||
*The device does have 2 watchdogs. | *The device does have 2 watchdogs, FWDGT and WWDGT. | ||
*The | *The WWDGT watchdog is fed during flash programming. | ||
==Device Specific Handling== | ==Device Specific Handling== | ||
Latest revision as of 14:22, 15 May 2024
The GigaDevice GD32C1 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor.
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Main flash | 0x08000000 | 128 KB | 
|
| Option Bytes | 0x1FFFF800 | 16 B |
|
| OTP Bytes | 0x1FFF7000 | 512 B | 
|
Watchdog Handling
- The device does have 2 watchdogs, FWDGT and WWDGT.
- The WWDGT watchdog is fed during flash programming.
Device Specific Handling
Connect
- On Connect, protection level is checked. For further information regarding this, please click here.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.