GigaDevice GD32A5: Difference between revisions

From SEGGER Knowledge Base
Jump to navigation Jump to search
Line 36: Line 36:
! Device || StartAddr || Size || J-Link Support
! Device || StartAddr || Size || J-Link Support
|-
|-
| GD32A503xB || 0x1FFFF800 || 24 Byte || scope="col" style="text-align:center" | {{YES}}
| GD32A503xx || 0x1FFFF800 || 24 Byte || scope="col" style="text-align:center" | {{YES}}
|-
| GD32A503xC || 0x1FFFF800 || 24 Byte|| scope="col" style="text-align:center" | {{YES}}
|-
| GD32A503xD || 0x1FFFF800 || 24 Byte|| scope="col" style="text-align:center" | {{YES}}
|}
|}



Revision as of 10:53, 15 February 2024

The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm® Cortex®-M33 processor.

Internal ECC RAM

Device StartAddr Size
GD32A503xB 0x20000000 24Kb
GD32A503xC 0x20000000 32Kb
GD32A503xD 0x20000000 48Kb
  *** Additional information ***

In order to prevent errors when reading first time, the DLL intialises the first 24Kb of RAM starting at 0x2000 0000.

Supported Flash Banks

Internal Flash

Device StartAddr Size J-Link Support
GD32A503xB 0x08000000 128Kb YES.png
GD32A503xC 0x08000000 256Kb YES.png
GD32A503xD 0x08000000 384Kb YES.png

Option Byte

Device StartAddr Size J-Link Support
GD32A503xx 0x1FFFF800 24 Byte YES.png

Reset

The device uses normal reset, no special handling necessary.

Minimum requirements

  • J-Link software V7.82b or later

Evaluation Boards

Example Application